I have a PCB profile to which I have added a place keepout. The keepout consists of 2 closed loops, one inside the other which is offset by 1.5mm (this is to show where a plastic wall is located). I export the board data to IDF, then when importing into Allegro the keepouts are two separate large areas and not the thin wall required. I have looked at the EMN file in Wordpad and the keepouts are separated there, so it looks like the problem lies with the ProE export. So, my question is; can you have a keepout that contains multiple loops?
TIA
RD
TIA
RD